I am reviewing a arc flash SOW for a client and in their SOW they have the following statement: "Arc flash analysis shall be required for circuits rated 240V or less served by a transformer of 125 kVA or less, however in these cases the max arcing time used for the calculations shall be 0.5 second". Has anyone ever completed low voltage calculations like this? Seems to be out of line with IEEE 1584 so I was curious if this is something I missed? Seems like a risk especially with say a 112.5 KVA transformer with a 208V secondary and the secondary side is protected with a primary OCPD. I have seen some fairly high AFIE numbers in these cases and if you change that to a .5 clearing time it could drastically change the AFIE.

But were the calcs accurate?

There used to be a guy on this forum that mentioned low voltage faults with relatively low available current a lot on here. His refrain was arcing faults at those levels were nearly impossible to sustain in reality and the calcs were unreliable.

Kinda along the same lines as the calcs showing incredibly high IE at pad mounted transformer secondaries but when tested by EPRI the bus gaps were too great to sustain an arcing fault during their experiments, at least according to the same guy.

I'm offering no opinion here. Just stating what I've heard or read, up to you to do your own research.

Here's one of many discussions on the topic in this forum alone.

viewtopic.php?f=33&t=5416

Investigation Of Factors Affecting The Sustainability Of Arcs Below ... https://ep-us.mersen.com/sites/mersen_u ... w-250V.pdf

I could not find a date on the paper by Mersen but it looks like prior to 2018 since they used 1584-2002.

Generally they found the 2002 equations were conservative at 208V and measured energy from the tests was lower than predicted by the 2002 equations. They had to go to 5% over at 218V to measure values higher than 1584-2002 predicted.

Bus gap and presence of a barrier were critically important in being able to sustain arcs at 208 volt and found under certain conditions it was possible.

Many of their tests in open chambers did not sustain arcs at 208V over a range of available fault current.

I don't know how the new equations stack up against these tests at 208V.

Last reply, for now.

Has your model produced longer clearing times than 0.5 seconds / 30 cycles for the subscribed conditions? If not, there would not seem to be an issue. In SKM you can set a max clearing time. I assume you can do the same in ETAP and EasyPower.

Thanks for the response bbaumer. Yes, I am aware that you can set max clearing time, however the issue is setting the clearing time at .50 when a fault at a particular bus will not clear that fast. I agree, I dont know how sustainable an arc will be at the low voltage, but what I do know is if a secondary bus is relying on the primary OCPD to clear the fault, it likely won't happen in .5 sec. The attached TCC shows a 112.5 KVA with the primary fuse. The 208-volt bus arcing fault current is about 2600 amps. It is obvious that a secondary fault will not clear at .5 when relying on the primary fuse to clear. If someone was to get injured and you were sued, how could justify a blanket statement of all low voltage clearing times should be set to .5? In this case with a 2 sec clearing time its at 8 cal/cm2 and at .5 its at 1.5 cal/cm2.

I understood your question and application and your example TCC, but again, is that from your actual model? Do you even have any 112.5 dry types in the actual facility in question?

I agree with you that I don't think "arbitrarily" capping a clearing time at 0.5 seconds is a good idea but before I made a big deal out of it with the customer I would create the actual model and evaluate the results, with and without the 0.5 second cap. If the results weren't significantly different I would ignore the instruction for the cap and if they asked, I'd tell them I didn't need to cap it as the results were close to the same. If the results were significantly different and the calc'd energy was much higher than the capped I would bring it to the customer's attention and go from there. If they insisted I would put it in my reports and recommend against it.

Also, for what it's worth, I don't normally put labels on dry types that don't have doors (which are by far the majority) as they are not typically a piece of equipment that is likely to require inspection, testing, maintenance etc. while energized so I exclude those from the labeling.

I would definitely be looking for an issue at the secondary side disconnect or panelboard being fed from the transformer and proceed as mentioned above.

I suspect they had some consultant at some point in time tell them the IE was 103.2 calories/cm^2 at the line side of a 30 amp disconnect fed from a 15 kva transformer with 300' of #10 in between and decided enough was enough and instituted the 1/2 second cap policy.

Yes this is from an actual model. When I referenced first bus, that is the downstream panel or disconnect as we do not label dry type transformers either.

My question is about equipment that falls outside of arc hazard reporting requirements, and the LV and 1 phase devices fall in this category. I feel it is important to include labels on devices that do not get an arc energy calculation and label so that operators know that there is no arc hazard. How would an operator know that there is no hazard, or if a label has fallen off of a device? There are some plastic boxes on which even the most sticky labels have failed to stick well, and this is often due to oily mist in the air around the boxes. There is also the issue of reporting the voltage hazard. This would be the only hazard that could be listed on a label for a device that is excluded in an arc study since there is no arc hazard. Is there an implied requirement to show the voltage hazard, which means include a label, when there is no arc hazard reporting requirement? One answer is work procedure rules, with a check of data in the current study being required, but most electricians have probably never seen an arc study report. This is also an issue when estimating the cost of a system update for adding a new device. Do you have to now add an update of all the LV and single phase devices that were omitted in the old file? This can seriously increase the cost of a simple study update, and clients have asked for substantiation of the need for adding previously omitted system data. Can the LV and single phase be omitted, with no liability to the study engineer, by simply noting in a report or adding a note to a 1 line drawing that these devices are omitted? Omitting equipment in a study seems to be a liability issue for the study engineer. Is there a definitive listing of the range of equipment that must be included in a study?

The first question to answer is single phase electrical equipment 240VAC, can an abnormal arcing fault sustain. IEEE 1584 2002 and 2018 Edition do not apply to single phase electrical equipment, they apply to three phase 208VAC to 15kV electrical equipment. There is a not in Clause 4.11 that in hindsight as a voting member I should have made an effort to have deleted that states if the formulas are used for 240VAC single phase conservative results will be provided.

No kidding as the formulas do not apply to single phase electrical equipment.

The three phases need to interact with 2000A of available fault current as outlined in 2018 Edition of IEEE 1584. This was lowered from the 112.5kVA transformer size quoted in 2002 Edition of IEEE 1584.

Only 300 actual test were complete for IEEE 1584 2002 and then 1800-2000 for IEEE 1584 2018.

Other tests and papers that are quoted have even questioned 208VAC three phase abnormal arcing fault sustainability, specific conditions required.

IEEE 1584 has completed some lab based 240VAC single phase arcing faults and I am not sure when any definitive direction will be provided.

So right now more information testing and published papers by EPRI, SEPCO, the DOE and more recently please check Dr. John Wade's PhD dissertation from the University of Tennessee:

https://trace.tennessee.edu/utk_graddiss/6096/

Dr. Wade's report is the most detailed report with his test data, analysis etc. related to single phase low voltage abnormal arcing fault sustainability.

The DOR also published a paper related to 240VAC single phase and 208VAC three phase, they also quote the SEPCO research:

https://efcog.org/

Industry and employers need to control the narrative related to abnormal arcing fault and arc flash. Electric shock needs some focus!

Ultimately I recommend an employer control all of this with a compliant Electrical Safety Program.

As well employer's need to do a better job of controlling consulting engineers completing studies by issuing a detailed Scope of Work and Technical Specification. I provide this too my clients and audit reports on their behalf and provide feedback to the consulting engineer.

Misinformation and disinformation related to arc flash doesn't service industry.

Felix you mention "operator?" Under normal operating/equipment conditions no arc flash PPE is required to operate energized electrical equipment.

Employer's need to complete work task based risk assessments.

Opening and closing circuit breakers or disconnect switches with door closed doesn't require arc flash PPE.

Here are two of the notes under the low voltage NESC table, plus the reference:

2 Industry testing on this equipment by two separate major utilities and a research institute has demonstrated that
voltages 50 V to 250 V will not sustain arcs for more than 2 cycles, thereby limiting exposure to less than 4 cal/cm2.
(See Eblen and Short [B31].)
3 Value based on IEEE 1584-2002 formula for Motor Control Centers. [Gap = 1 in (2.54 cm)] (Xd = 1.641) [18 in
(46 cm) distance] 51 kA (based on a 208 V, 1000 kVA, 5.3% Z, served from a 500 MVA system). Maximum
duration without circuit protective device operation from industry testing (see 208-V Arc Flash Testing [B1]) is
10 cycles: 46.5 cal/s/cm2 x 0.167 s = 7.8 cal/cm2
(See Eblen and Short [B31].)

[B31] Eblen, M. L., and Short, T. A., “Low Voltage Arc Sustainability,� IEEE Transactions on Industry
Applications, vol. 54, issue: 3, pp. 2934–2946, 2018.

Compared to 2 and 10 cycles, 0.5s looks conservative.

Isn't there guidance in 1584 that references a 3-phase equivalent for a conservative arc flash IE on single phase equipment? I seem to remember reading that in the past although I can't recall where at.

Read it. Mersen did the tests. They publish it freely. No significant difference.